/*
 Produced by NSL Core, IP ARCH, Inc. Fri Jun 04 17:54:28 2010

 Licensed to :EVALUATION USER:
*/

module HiZ_sample_INOUT ( p_reset , m_clock , HiZIO_pin , IN_from_HiZIO , OUT_to_HiZIO , OEN );
  input p_reset, m_clock;
inout HiZIO_pin;
  output IN_from_HiZIO;
  input OUT_to_HiZIO;
  input OEN;

   assign  HiZIO_pin = (OEN)? ((OEN)?OUT_to_HiZIO:1'bZ):1'bz;
   assign  IN_from_HiZIO = HiZIO_pin;
endmodule
/*
 Produced by NSL Core, IP ARCH, Inc. Fri Jun 04 17:54:28 2010

 Licensed to
*/