/*
 Produced by NSL Core, IP ARCH, Inc. Fri Jun 04 17:54:19 2010

 Licensed to :EVALUATION USER:
*/

module func_seq_test ( p_reset , m_clock , Ain , Bin , Qout , Mult , Comp );
  input p_reset, m_clock;
  input [3:0] Ain;
  input [3:0] Bin;
  output [7:0] Qout;
  input Mult;
  output Comp;
  reg [7:0] temp_result;
  wire exec_mult;
  reg _reg_0;
  reg _reg_1;

   assign  exec_mult = Mult|_reg_1;
   assign  Qout =
//synthesis translate_off
(_reg_0)?
//synthesis translate_on
((_reg_0)?temp_result[7:0]:8'b0)
//synthesis translate_off
:8'bx
//synthesis translate_on
;
   assign  Comp = _reg_0;
always @(posedge m_clock or posedge p_reset)
  begin
if (p_reset)
     temp_result <= 8'b00000000;
else if (exec_mult)
      temp_result <= (Ain[3:0])*(Bin[3:0]);
end
always @(posedge m_clock or posedge p_reset)
  begin
if (p_reset)
     _reg_0 <= 1'b0;
else if (Mult|_reg_0|_reg_1)
      _reg_0 <= _reg_1|Mult;
end
always @(posedge m_clock or posedge p_reset)
  begin
if (p_reset)
     _reg_1 <= 1'b0;
else if (_reg_1)
      _reg_1 <= 1'b0;
end
endmodule
/*
 Produced by NSL Core, IP ARCH, Inc. Fri Jun 04 17:54:19 2010

 Licensed to
*/

module top ( p_reset , m_clock , a , b , q , go );
  input p_reset, m_clock;
  input [3:0] a;
  input [3:0] b;
  output [7:0] q;
  input go;
  wire _DUT_Comp;
  wire _DUT_Mult;
  wire [7:0] _DUT_Qout;
  wire [3:0] _DUT_Bin;
  wire [3:0] _DUT_Ain;
func_seq_test DUT (.p_reset(p_reset), .m_clock(m_clock), .Comp(_DUT_Comp), .Mult(_DUT_Mult), .Qout(_DUT_Qout), .Bin(_DUT_Bin), .Ain(_DUT_Ain));

   assign  _DUT_Mult = go;
   assign  _DUT_Bin =
//synthesis translate_off
(go)?
//synthesis translate_on
((go)?b:4'b0)
//synthesis translate_off
:4'bx
//synthesis translate_on
;
   assign  _DUT_Ain =
//synthesis translate_off
(go)?
//synthesis translate_on
((go)?a:4'b0)
//synthesis translate_off
:4'bx
//synthesis translate_on
;
   assign  q =
//synthesis translate_off
(_DUT_Comp)?
//synthesis translate_on
((_DUT_Comp)?_DUT_Qout:8'b0)
//synthesis translate_off
:8'bx
//synthesis translate_on
;
endmodule
/*
 Produced by NSL Core, IP ARCH, Inc. Fri Jun 04 17:54:19 2010

 Licensed to
*/