/* ************************************************************ */
declare PAR16 {

    input       Data_i[16] ;

    output      Parity_o1 ;
    output      Parity_o2 ;

}

/* ************************************************************ */
// Declare module
module PAR16 {

/* ************************************************************ */
// Internal operation signals
    wire    tmp_Parity_o1 ;
    wire    tmp_Parity_o2 ;

/* ************************************************************ */
// Equation

    {
    // Example statement #1
        tmp_Parity_o1 = {
            Data_i[7] ^ Data_i[6] ^ Data_i[5] ^ Data_i[4] ^
            Data_i[3] ^ Data_i[2] ^ Data_i[1] ^ Data_i[0]
        } ;
        tmp_Parity_o2 = {
            Data_i[15] ^ Data_i[14] ^ Data_i[13] ^ Data_i[12] ^
            Data_i[11] ^ Data_i[10] ^ Data_i[9] ^ Data_i[8]
        } ;

        Parity_o1 = tmp_Parity_o1 ^ tmp_Parity_o2  ;  

    // Example statement #2
        Parity_o2 = ^( Data_i[15:0] ) ;
    }
}
/* ************************************************************ */