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Home > Support > NSL design Sample > Beginners

Beginners

  • 1 input single gate BUF logic
  • 1 input single gate inverter logic
  • 2 input AND gate
  • 2 input OR gate
  • 2 input NAND gate
  • 2 input NOR gate
  • 2 input Exclusive OR gate
  • 2 input Exclusive NOR gate
  • 3 input AND – OR gate
  • 3 input OR – AND gate
  • 3 input MAJORITY combination logic
  • 3-STATE Octal Bus Transceiver Type-A
  • 3-STATE Octal Bus Transceiver Type-B
  • 3-STATE Octal Bus Transceiver Type-C
  • 1bit Hi-Z IN/OUT single direction I/O
  • 1bit Hi-Z OUTPUT single direction I/O
  • 1bit Hi-Z IN/OUT bidirection I/O
  • 1bit F/F sample with asynchronous reset
  • 1bit F/F sample with synchronous reset.
  • 4bit F/F sample with AR ( Databus sample )
  • 4bit F/F sample with SR ( Databus sample )
  • 4bit binary counter
  • 8bit binary counter ( 4bit counter x 2 instanciated )
  • 8bit parity generator
  • 16bit parity generator
  • 32bit parity generator
  • 4bit synchronous adder
  • 4bit asynchronous adder
  • 8word x 8bit width PROM sample
  • 8word x 8bit width SRAM(Memory array) sample
  • 15word x 8bit width synchronous FIFO sample
  • 4bit adder. Hierarchy design.
  • Sequential operation example of 4bit by 4bit multiply function
  • IF statement variety code

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