NSL Overture – High Level Hardware Integrated Design Environment

NSL Overture is an Integrated Development Environment of the new-generation hardware description language NSL (Next Synthesis Language) provided by Overtone Corporation. This product can generate NSL from NSL Editor and the rapidly growing UML (Unified Modeling Language), as well as generate RTL code with the NSL behavior synthesis engine, NSL Core. In addition, this Eclipse-based integrated development environment integrates logic simulation for the verification environment and generates FPGA configuration data through the running of each FPGA manufacturer’s development tools. Moreover, it is a development environment that can be used by a broad range of people from development engineers using programming language C for signal processing of embedded systems and image processing, etc., to ASIC/FPGA development engineers using RTL (Verilog HDL, VHDL), to even those just now embarking in hardware design.

NSL

NSL is a new generation hardware design language created in response to the growing size of circuits. It allows circuit design to be accomplished with minimal design because it has high level of abstraction in the behavior description, language capable of clock cycle management，and incorporates programming language C to the language specification optimizing characteristics of Verilog HDL and VHDL. An additional advantage is the ability to incorporate IP Core already developed with Verilog HDL and VHDL．The details are as below.

NSL Overture Principal Functions

NSL Core
NSL Core selects the output language and automatically generates RTL codes (Autobuild). It supports Verilog HDL and VHDL for logic synthesis and SystemC for verification, as well. The details are as below.

NSL Editor
NSL Editor is a text editor that not only color-codes reserved words and performs code completion, it also possesses debugging support functions and outline functions that list signal names and variable parameter used in source codes.

UML to NSL (UMLTools)
UML Profile for NSL is suggested as hardware development support for UML and, from UML class diagrams, high-level circuit NSL skeletons are generated.

NSL Verification Tool
NSL Verification Tool supports verification using behavioral simulation together with a Verilog logic simulator (Icarus) and a waveform viewer (GTKWave). It also supports the running of external simulators (ModelSim). Moreover, with a SystemC simulator, not only can high speed verification of C/C++ algorithms be actuated, development output confirmation can be performed mutually between hardware development and software development.

Direct Implementation
Development tools provided by FPGA manufacturers can be directly executed from NSL Overture and generate FPGA configuration data.

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